1. Field of the Invention
The present invention relates to a structure for a junction of a terminal pad and solder, wherein the terminal pad formed on an underlying base and the solder are joined to each other satisfactorily. The present invention also relates to a semiconductor device having the junction structure, and a method for manufacturing the semiconductor device.
2. Description of the Related Art
A semiconductor chip equipped with solder made molten by a heating process, such as a solder BGA (Ball Grid Array), an LGA (Land Grid Array) or the like, is in widespread use as a semiconductor device.
When the semiconductor device is manufactured, the solder, such as the BGA, LGA or the like, is bonded or joined to its corresponding terminal pad formed on an exposed surface of the semiconductor device (refer to, for example, Japanese Unexamined Patent Publication No. 2002-261105 (paragraphs 69 to 76 and FIG. 17). Further, when the semiconductor device is mounted onto a substrate, the solder, such as the BGA, LAG or the like, is bonded to its corresponding terminal pad of the substrate.
A junction structure (hereinafter called simply “junction structure”) of the terminal pad and solder according to the prior art, which has been disclosed in Japanese Unexamined Patent Publication No. 2002-261105, will be explained below in detail with a semiconductor device having this junction structure as an example. Incidentally, the junction structure according to the prior art had a configuration in which the solder was disposed directly on its corresponding terminal pad by printing or plating.
Configuration of the semiconductor device having the junction structure according to the prior art disclosed in Japanese Unexamined Patent Publication No. 2002-261105 will be explained below with reference to FIG. 11. Incidentally, the semiconductor device will be described here with a semiconductor chip equipped with a BGA, i.e., a semiconductor chip in which a solder ball is mounted onto its corresponding terminal pad, as an example.
Incidentally, FIG. 11 is merely an approximate illustrations of the shape, size and physical relationship of each constituent element. Since sectional structures of semiconductor devices differ depending upon products, their detailed explanations are omitted here.
As shown in FIG. 11, a semiconductor device (hereinafter called simply a “semiconductor device according to the prior art”) 100 having the junction structure according to the prior art is provided with an underbed or underlying base 105 corresponding to an area in which various semiconductor elements constituting the semiconductor device are formed, a conductive layer 110 formed on the underlying base 105, and an insulating layer 115 and a terminal pad 120 both formed on the conductive layer 110.
Incidentally, the terminal pad 120 is generally constituted of Cu (copper). Therefore, the terminal pad 120 will now be referred to as a Cu pad.
In the semiconductor device 100, a flux 130 is printed on the Cu pad 120, and a solder ball 140 is further mounted on the flux 130.
Process for manufacturing the semiconductor device according to the prior art will be explained below with reference to FIGS. 12(A) through 12(D). Incidentally, FIG. 12 shows fragmentary sectional cut areas obtained at respective process steps.
As shown in FIG. 12(A), a structure is prepared in which a terminal pad 120 is formed over an underlying base 105 of the semiconductor device 100. In the present structure, for example, wiring and other required conductive layer 110 are provided on the underlying base 105, and a Cu pad is provided on the conductor layer 110 as the terminal pad 120. Further, an insulating layer 115 that buries the periphery of the Cu pad 120 is provided over the underlying base 105. The top surface of the Cu pad 120 lies within the same plane as the top or upper surface of the insulating layer 115. Incidentally, the top surface of the Cu pad 120 is exposed to the outside and its exposed surface is covered with an oxide film (not shown) produced by allowing the Cu pad 120 and oxygen in the atmosphere to react with each other.
Next, as shown in FIG. 12(B), a flux 130 is applied onto the Cu pad 120. Thus, the oxide film formed at the exposed surface of the Cu pad 120 is removed to make it easy to bond solder and the Cu pad 120 to each other.
Next, as shown in FIG. 12(C), a solder ball 140 is mounted onto the flux 130.
Incidentally, a material containing Pb (lead), such as an Sn—Pb system, has been used as the conventional solder. Here, the term “Sn—Pb system” means a mixture of Sn and Pb (hereinafter called “Sn—Pb”) itself or an Sn—Pb mixture containing other material of about a few wt % to a few tens of wt %. When the material is represented with its name being marked with “system”, it is assumed to be indicative of its material per se or the material containing other material of about a few wt % to a few tens of wt % below.
Since, however, the solder containing Pb has defective conditions in that it destroys an surrounding environment and significantly erodes an apparatus for manufacturing a semiconductor device, for example, its use is being kept under control. Therefore, Pb-free solder (hereinafter called “Pb-free solder”) is replacing Pb-containing solder (hereinafter called “Pb solder”) as solder to be used. Incidentally, solder containing a mixture of Sn, Ag and Cu (hereinafter called “Sn—Ag—Cu system solder”) is becoming main stream as the Pb-free solder.
Next, as shown in FIG. 12(D), the solder ball 140 is subjected to a heating process for performing reflow (hereinafter called the “reflow process”) to melt the solder ball 140.
With the reflow process, the solder ball 140 melts to bond to the Cu pad 120, thereby forming a BGA 150.
At this time, the solder ball 140 reacts with the Cu pad 120 at a portion bonded to the Cu pad 120. Thus, a layer of an intermetallic reactive product 160 is formed between the Cu pad 120 and the solder ball 140. Incidentally, when the material for the solder ball 140 is, for example, a Sn—Pb system solder or a Sn—Ag—Cu system solder, a reactive product of Cu and Sn (hereinafter called “Cu—Sn reactive product”), specifically, Cn6Sn5 or the like is formed as the intermetallic reactive product 160.
The BGA, i.e., the semiconductor chip equipped with the melted solder ball 140 is manufactured in the above-described manner. Incidentally, a semiconductor chip equipped with an LGA is also manufactured by a process approximately similar to the manufacturing process shown in FIG. 12.
The solder, such as the BGA, LGA or the like, is bonded or joined to its corresponding terminal pad of the substrate when the semiconductor device is mounted to the substrate as described above.
A mounting structure according to the prior art will be explained below with reference to FIG. 13.
As shown in FIG. 13(A), terminal pads 520 are disposed on a substrate 500 at predetermined positions.
Incidentally, each of the terminal pads 520 is generally made up of Cu (copper). Therefore, the terminal pad 520 will now be explained as a Cu pad.
In the mounting structure according to the prior art, a semiconductor device 100 and the substrate 500 are laid out in such a manner that the surface on the formed side of each Cu pad 120 and the surface on the formed side of each Cu pad 520 are opposite to each other. In the example shown in FIG. 13(A), the surface on the side of formation of each Cu pad 120 is turned downward and the semiconductor device 100 is disposed on the substrate 500.
In this state, a reflow process, i.e., a heating process for reflowing each BGA 150 is performed to melt each BGA 150.
With the reflow process, the BGAs 150 melt to bond to their corresponding Cu pads 520 as shown in FIG. 13(B).
At this time, the BGAs 150 react with the Cu pads 520 at portions bonded to the Cu pads 520 respectively. Thus, a layer of an intermetallic reactive product (hereinafter called “intermetallic reactive product”) 540 is formed at the portion bonded to each Cu pad 520. Incidentally, when the material for the BGA 150 is of, for example, Sn—Ag—Cu system solder, a Cu—Sn reactive product is formed as the intermetallic reactive product 540.
Thus, the BGA, the LGA or the like are bonded to the terminal pads 520 of the substrate 500.
However, the semiconductor device according to the prior art was accompanied by the problem that the reliability of the junction between the terminal pad and solder was low. This problem will be explained below.
The semiconductor device is subjected to thermal stress in the cases (A) through (C) shown below.
(A) The semiconductor device is subjected to thermal stress during a reflow process at the manufacture of the semiconductor device, i.e., a process for joining or bonding the terminal pad lying inside the semiconductor device and its corresponding solder by heating and cooling.
(B) The semiconductor device is subjected to thermal stress during a reflow process at the time that a semiconductor device provided thereinside with a junction structure of a terminal pad and solder is mounted to its corresponding substrate, that is, upon a process at the time that the terminal pad of the substrate and the solder of the semiconductor device are bonded to each other by heating and cooling.
(C) The semiconductor device is subjected to thermal stress during an operating process at the time that a product equipped with a semiconductor device provided thereinside with a junction structure of a terminal pad and solder is activated, and upon its stop process.
In the semiconductor device according to the prior art, cracks were prone to occur between the terminal pad and the solder due to the following reasons (1) through (3) in the main with the factor of the thermal stress applied in the cases of (A) through (C) referred to above. Incidentally, the term “between the terminal pad and the solder” means not only between the terminal pad lying inside the semiconductor device and the solder but also between the terminal pad of the substrate and the solder of the semiconductor device.
(1) In the semiconductor device according to the prior art, the Cu—Sn reactive product layer is formed at the junction portion between the terminal pad and the solder as the intermetallic reactive product.
The Cu—Sn reactive product layer is relatively large in thermal expansion coefficient based on heating and heat shrinkage rate or percentage based on cooling and thermal radiation. Therefore, the Cu—Sn reactive product layer is low in resistance to the thermal stress applied in the cases of (B) and (C). Hence, cracks were prone to occur in the junction portion between the solder and the terminal pad under an environment with a large difference in temperature in the semiconductor device according to the prior art.
Incidentally, the thermal stress applied in the cases of (B) and (C) referred to above concentrates on, particularly, a portion below the junction portion, i.e., an area on the terminal pad side of the Cu—Sn reactive product layer. Therefore, cracks have been apt to occur in the portion below the junction portion, i.e., the area on the terminal pad side of the Cu—Sn reactive product layer.
(2) In recent years, as the solder, Sn—Ag—Cu system solder that is in the main stream of Pb-free solder is being used as an alternative to Sn—Pb system solder that is in the main stream of Pb solder.
The resistance of the solder to the thermal stress applied in the cases of (A) through (C) referred to above trends to deteriorate as the hardness of the solder becomes higher.
The Sn—Pb system solder is a relatively soft material, whereas the Sn—Ag—Cu system solder is a material harder than the Sn—Pb system solder. Thus, the Sn—Ag—Cu system solder is lower than the Sn—Pb system solder in resistance to the thermal stress applied in the above cases of (A) through (C). Therefore, the Sn—Ag—Cu system solder makes the thermal stress easier to concentrate on the portion below the junction portion as compared with the Sn—Pb system solder. Thus, cracks have been prone to occur between the solder and the terminal pad.
(3) The semiconductor device has a tendency to pitch narrowing and thinning. Therefore, the diameter of the terminal is becoming smaller and the height thereof is becoming lower in the semiconductor device.
When the diameter of the terminal becomes smaller and the height thereof becomes lower, space for the junction portion between the solder and the terminal pad becomes small. Therefore, the thermal stress applied in the cases of (A) through (C) is apt to concentrate on the portion below the junction portion in the semiconductor device. Thus, cracks have been prone to occur in the portion below the junction portion between the solder and the terminal pad.
Thus, the semiconductor device according to the prior art made it easy to produce cracks between the terminal pad and the solder due to the above reasons of (1) through (3).
When cracks occur in the semiconductor device, a failure in junction occurs between the terminal pad and the solder due to the cracks.
Thus, for the semiconductor device according to the prior art, the reliability of the junction between the terminal pad and the solder was deteriorated due to the above reasons of (1) through (3), i.e., due to the fact that (1) the Cu—Sn reactive product layer is formed in the junction portion, (2) the hard Sn—Ag—Cu system solder is used instead of the soft Sn—Pb system solder as the solder, and (3) the semiconductor device is narrowed in pitch and made thin.
Thus, the semiconductor device according to the prior art was accompanied by a problem that the reliability of the junction between the terminal pad and the solder was low.
The problem that the reliability of the junction between the solder and the terminal pad is low is an important problem in terms of the evaluation of the reliability of the semiconductor device and is a very intractable problem.
The inventors of the present application have found out that if an alloy layer containing Zn is formed between the terminal pad and the solder, then the problems of the prior art can be resolved from the result of extensive investigations by paying attention to the following characteristics of (1) through (3) included in a Zn (Zinc) system material.
The Zn system material has the following three characteristics:
(1) the characteristic that the Zn system material is smaller than the Cu—Sn reactive product in thermal expansion coefficient based on heating and thermal shrinkage rate based on cooling or heat radiation,
(2) the characteristic that the Zn system material is softer than the Sn—Ag—Cu system solder that is in the main stream of the material for the Pb-free solder, and
(3) the characteristic that the Zn system material is lower in oxidative property than other material having the above characteristics (1) and (2).
The present invention has been made to solve the above problems. It is therefore an object of the present invention to provide a junction structure of a terminal pad and solder, wherein a Zn-containing alloy layer having the above characteristics (1) through (3) is formed between the terminal pad and the solder thereby to enhance reliability of a junction between the terminal pad and the solder, a semiconductor device having the junction structure, and a method for manufacturing the semiconductor device.